Compositions and methods for planarizing or polishing the surface of a substrate are well known in the art. Polishing compositions (also known as polishing slurries) typically contain an abrasive material in an aqueous solution and are applied to a surface by contacting the surface with a polishing pad saturated with the polishing composition. Typical abrasive materials include silicon dioxide, cerium oxide, aluminum oxide, zirconium oxide, and tin oxide. U.S. Pat. No. 5,527,423, for example, describes a method for chemically-mechanically polishing a metal layer by contacting the surface with a polishing slurry comprising high purity fine metal oxide particles in an aqueous medium. The polishing slurry is typically used in conjunction with a polishing pad (e.g., polishing cloth or disk). Suitable polishing pads are described in U.S. Pat. Nos. 6,062,968, 6,117,000, and 6,126,532 which disclose the use of sintered polyurethane polishing pads having an open-celled porous network and U.S. Pat. No. 5,489,233 which discloses the use of solid polishing pads having a surface texture or pattern. Alternatively, the abrasive material may be incorporated into the polishing pad. U.S. Pat. No. 5,958,794 discloses a fixed abrasive polishing pad.
Conventional polishing systems and polishing methods typically are not entirely satisfactory at planarizing semiconductor wafers. In particular, polishing compositions and polishing pads can have less than desirable polishing rates or polishing selectivities, and their use in chemically-mechanically polishing semiconductor surfaces can result in poor surface quality. Because the performance of a semiconductor wafer is directly associated with the planarity of its surface, it is crucial to use a polishing composition and method that results in a high polishing efficiency, selectivity, uniformity, and removal rate and leaves a high quality polish with minimal surface defects.
The difficulty in creating an effective polishing system for semiconductor wafers stems from the complexity of the semiconductor wafer. Semiconductor wafers are typically composed of a substrate, on which a plurality of transistors has been formed. Integrated circuits are chemically and physically connected into a substrate by patterning regions in the substrate and layers on the substrate. To produce an operable semiconductor wafer and to maximize the yield, performance, and reliability of the wafer, it is desirable to polish select surfaces of the wafer without adversely affecting underlying structures or topography. In fact, various problems in semiconductor fabrication can occur if the process steps are not performed on wafer surfaces that are adequately planarized.
Typically, polishing compositions for polishing dielectric materials require an alkaline pH in order to obtain sufficient removal rates for the dielectric. For example, U.S. Pat. Nos. 4,169,337, 4,462,188, and 4,867,757 disclose polishing compositions for silicon dioxide removal comprising silica abrasives at an alkaline pH. Similarly, WO 00/25984, WO 01/56070, and WO 02/01620 disclose polishing compositions for STI polishing comprising fumed silica at alkaline pH. U.S. Patent Application 2001/0051433 A1 discloses a polishing composition for dielectric CMP comprising fumed silica and a cesium salt with a pH of 7 or greater.
Such alkaline polishing compositions, while effective in the removal of silicon dioxide dielectric materials, provide poor selectivity in substrates comprising both silicon dioxide and silicon nitride layers, as in Shallow Trench Isolation (STI) substrates. The use of acid additives to improve the selectivity in STI polishing is known in the art. U.S. Pat. Nos. 5,738,800, 6,042,741, 6,132,637, and 6,218,305 disclose the use of acid-containing complexing agents in polishing compositions comprising an abrasive (e.g., ceria or silica) at a pH of preferably about 6 to about 7. The acid species of the complexing agents can be carboxylic acids, sulfonic acids, or phosphonic acids. U.S. Pat. No. 5,614,444 discloses the use of additives comprising anionic, cationic, or nonionic polar groups to suppress the removal of a dielectric material (e.g., silicon dioxide or silicon nitride). EP 1 061 111 A1 discloses polishing compositions for STI polishing comprising ceria abrasive and an organic compound comprising a carboxylic acid or sulfonic acid group, preferably at a pH>4. The use of sulfonic acid additives as dispersants or flocculating agents for abrasives is also commonly known in the art. For example, JP 01087146 discloses a polishing composition comprising water, polystyrenesulfonic acid (or salt thereof) dispersing agent, and a polishing agent (e.g., aluminum oxide (i.e., alumina), silicon dioxide, cerium oxide, zirconium oxide, titanium oxide, or silicon nitride). U.S. Pat. No. 6,117,220 discloses a polishing composition for use in polishing a memory hard disk comprising water, polystyrenesulfonic acid, an inorganic acid or organic acid, and an abrasive selected from the group consisting of alumina, silica, ceria, zirconia, titania, silicon nitride, and magnesia. JP 2001064631 discloses a polishing composition comprising an abrasive and a polymer or copolymer comprising sulfonic acid groups, with a pH of 1-13.
A need remains, however, for polishing systems and polishing methods that will exhibit desirable planarization efficiency, selectivity, uniformity, and removal rate during the polishing and planarization of dielectric substrates, while minimizing defectivity, such as surface imperfections and damage to underlying structures and topography during polishing and planarization.
The invention seeks to provide such a chemical-mechanical polishing system and method. These and other advantages of the invention will be apparent from the description of the invention provided herein.